| General information |
| Product type designation | CPU 1512SP-1 PN |
| HW functional status | FS05 |
| Firmware version | V2.9 |
| Product function |
| ● I&M data | Yes; I&M0 to I&M3 |
| ● Module swapping during operation (hot swapping) | Yes; Multi-hot swapping |
| ● Isochronous mode | Yes; Only with PROFINET; with minimum OB 6x cycle of 625 µs |
| Engineering with |
| ● STEP 7 TIA Portal configurable/integrated from version | V17 (FW V2.9) / V13 SP1 Update 4 (FW V1.8) or higher |
| Configuration control |
| via dataset | Yes |
| Control elements |
| Mode selector switch | 1 |
| Supply voltage |
| Rated value (DC) | 24 V |
| permissible range, lower limit (DC) | 19.2 V |
| permissible range, upper limit (DC) | 28.8 V |
| Reverse polarity protection | Yes |
| Mains buffering |
| ● Mains/voltage failure stored energy time | 5 ms |
| Input current |
| Current consumption (rated value) | 0.6 A |
| Current consumption, max. | 0.9 A |
| Inrush current, max. | 4.7 A; Rated value |
| I²t | 0.14 A²·s |
| Power |
| Infeed power to the backplane bus | 8.75 W |
| Power loss |
| Power loss, typ. | 5.6 W |
| Memory |
| Number of slots for SIMATIC memory card | 1 |
| SIMATIC memory card required | Yes |
| Work memory |
| ● integrated (for program) | 200 kbyte |
| ● integrated (for data) | 1 Mbyte |
| Load memory |
| ● Plug-in (SIMATIC Memory Card), max. | 32 Gbyte |
| Backup |
| ● maintenance-free | Yes |
| CPU processing times |
| for bit operations, typ. | 48 ns |
| for word operations, typ. | 58 ns |
| for fixed point arithmetic, typ. | 77 ns |
| for floating point arithmetic, typ. | 307 ns |
| CPU-blocks |
| Number of elements (total) | 4 000; Blocks (OB, FB, FC, DB) and UDTs |
| DB |
| ● Number range | 1 ... 60 999; subdivided into: number range that can be used by the
user: 1 ... 59 999, and number range of DBs created via SFC 86: 60
000 ... 60 999 |
| ● Size, max. | 1 Mbyte; For DBs with absolute addressing, the max. size is 64 KB |
| FB |
| ● Number range | 0 ... 65 535 |
| ● Size, max. | 200 kbyte |
| FC |
| ● Number range | 0 ... 65 535 |
| ● Size, max. | 200 kbyte |
| OB |
| ● Size, max. | 200 kbyte |
| ● Number of free cycle OBs | 100 |
| ● Number of time alarm OBs | 20 |
| ● Number of delay alarm OBs | 20 |
| ● Number of cyclic interrupt OBs | 20; With minimum OB 3x cycle of 500 µs |
| ● Number of process alarm OBs | 50 |
| ● Number of DPV1 alarm OBs | 3 |
| ● Number of isochronous mode OBs | 1 |
| ● Number of technology synchronous alarm OBs | 2 |
| ● Number of startup OBs | 100 |
| ● Number of asynchronous error OBs | 4 |
| ● Number of synchronous error OBs | 2 |
| ● Number of diagnostic alarm OBs | 1 |
| Nesting depth |
| ● per priority class | 24 |
| Counters, timers and their retentivity |
| S7 counter |
| ● Number | 2 048 |
| Retentivity |
| — adjustable | Yes |
| IEC counter |
| ● Number | Any (only limited by the main memory) |
| Retentivity |
| — adjustable | Yes |
| S7 times |
| ● Number | 2 048 |
| Retentivity |
| — adjustable | Yes |
| IEC timer |
| ● Number | Any (only limited by the main memory) |
| Retentivity |
| — adjustable | Yes |
| Data areas and their retentivity |
| Retentive data area (incl. timers, counters, flags), max. | 128 kbyte; Available retentive memory for bit memories, timers,
counters, DBs, and technology data (axes): 88 KB |
| Flag |
| ● Size, max. | 16 kbyte |
| ● Number of clock memories | 8; 8 clock memory bit, grouped into one clock memory byte |
| Data blocks |
| ● Retentivity adjustable | Yes |
| ● Retentivity preset | No |
| Local data |
| ● per priority class, max. | 64 kbyte; max. 16 KB per block |
